Technical Field
The present disclosure relates to the field of semiconductor technologies, and in particular, to resistance devices and a manufacturing method thereof.
Related Art
As sizes of metal oxide semiconductor field effect transistor (MOSFET) devices are reduced, a short channel effect (SCE for short) becomes more dramatic. Fin field effect transistor (FinFET) devices display relatively desirable gate control capabilities for channel charges. As a result, sizes of complementary metal oxide semiconductor (CMOS) devices based on FinFET can be further reduced with insignificant SCE problems.
In a system-on-a-chip (SOC) system, a resistance device is an important device element. In an existing manufacturing process, resistance devices may be disposed on some structure layers. For example, a resistance device may be disposed on an inter-layer dielectric layer, but procedures such as planarization of the inter-layer dielectric layer may be involved in the manufacturing process. The planarization process may create recesses in the inter-layer dielectric layer on which the resistance device is formed. Consequently, uniformity of the resistance device becomes poor. Especially in a process of manufacturing a resistance device and another FinFET device at the same time, a planarization procedure of an inter-layer dielectric layer and a metal gate may be involved, and the inter-layer dielectric layer may form a recesses. Consequently, uniformity of the devices is relatively poor, and metal residues may be formed, affecting performance of the devices and a product yield.